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  • VerilogCSP

    • In integrated circuit design, VerilogCSP is a set of macros added to Verilog HDL to support Communicating Sequential Processes (CSP) channel communications

    VerilogCSP

    VerilogCSP

  • Parallel programming model

    • Abstraction of parallel computer architecture

    Communicating sequential processes Synchronous message passing Task Ada, Occam, VerilogCSP, Go Circuits Message passing Task Verilog, VHDL Dataflow Message passing

    Parallel programming model

    Parallel_programming_model

  • Communicating sequential processes

    • Formal model in concurrency theory

    and history monoid Ease programming language XC programming language VerilogCSP is a set of macros added to Verilog HDL to support communicating sequential

    Communicating sequential processes

    Communicating_sequential_processes

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