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Search references for MIPS X. Phrases containing MIPS X
See searches and references containing MIPS X!MIPS X
developed as a follow-on project to the MIPS project at Stanford University by the same team that developed MIPS. The project was supported by the Defense
MIPS-X
Instruction set architecture
developed by MIPS Computer Systems, now MIPS Technologies, based in the United States. There are multiple versions of MIPS, including MIPS I, II, III,
MIPS_architecture
Topics referred to by the same term
Look up MIPS in Wiktionary, the free dictionary. MIPS may refer to: MIPS Technologies, an American semiconductor design firm Maharana Institute of Professional
MIPS
Research project into RISC-based microprocessor design
MIPS (also known as Stanford MIPS to disambiguate it from later architectures), an acronym for Microprocessor without Interlocked Pipeline Stages, was
Stanford_MIPS
American fabless semiconductor design company
37.4201°N 122.0728°W / 37.4201; -122.0728 MIPS Tech LLC, formerly MIPS Computer Systems, Inc. and MIPS Technologies, Inc., is an American fabless semiconductor
MIPS_Technologies
Processor executing one instruction in minimal clock cycles
concepts in two seminal projects, Stanford MIPS and Berkeley RISC. These were commercialized in the 1980s as the MIPS and SPARC systems. IBM eventually produced
Reduced instruction set computer
Reduced_instruction_set_computer
Computer component
CPU without causing loss of compatibility for the operating system. The MIPS architecture specifies a software-managed TLB. The SPARC V9 architecture
Translation_lookaside_buffer
Aspect of the instruction set architecture of CPUs
Hennessy; Mark A. Horowitz (1986). "An Overview of the MIPS-X-MP Project" (PDF). ... MIPS-X uses a single addressing mode: base register plus offset
Addressing_mode
Method of CPU communication
Instruction sets Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC
Memory-mapped I/O and port-mapped I/O
Memory-mapped_I/O_and_port-mapped_I/O
Standard file format for executables, object code, shared libraries, and core dumps
Motorola 88000 (M88k) 0x06 Intel MCU 0x07 Intel 80860 0x08 MIPS 0x09 IBM System/370 0x0A MIPS RS3000 Little-endian 0x0B – 0x0E Reserved for future use 0x0F
Executable and Linkable Format
Executable_and_Linkable_Format
Digital circuit that produces sums from inputs
Instruction sets Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC
Adder_(electronics)
Combinational digital circuit
when "111" => Y <= A xor B; -- bitwise XOR when others => Y <= (others => 'X'); end case; end behavioral; Mathematician John von Neumann proposed the ALU
Arithmetic_logic_unit
Security-related instruction code processor extension
Instruction sets Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC
Software_Guard_Extensions
Hardware cache of a central processing unit
often claimed in literature to be useless and non-existing. However, the MIPS R6000 uses this cache type as the sole known implementation. The R6000 is
CPU_cache
Instruction slot being executed without the effects of a preceding instruction
processor designs. The MIPS I ISA (implemented in the R2000 and R3000 microprocessors) has such a slot. The following example is MIPS I assembly code, showing
Delay_slot
Problems with central processing unit design
Instruction sets Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC
Hazard (computer architecture)
Hazard_(computer_architecture)
American computer architect (born 1957)
circuits and he led a number of early RISC processor designs, including MIPS-X. His research has been in the fields of electrical engineering, computer
Mark_Alan_Horowitz
Type of digital adder
Instruction sets Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC
Carry-save_adder
Machine instruction that indicates to a computer to do nothing
(2002). "TeX Primitive Control Sequences". TeX Reference Manual. Kluwer Academic Publishers. Retrieved 1 April 2020. According to The TeXbook, 'TeX does nothing'
NOP_(code)
Register in a computer's CPU
Instruction sets Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC
Memory_buffer_register
Circuit that performs subtraction
D = X ⊕ Y ⊕ B i n {\displaystyle D=X\oplus Y\oplus B_{in}} B o u t = X ¯ B i n + X ¯ Y + Y B i n {\displaystyle B_{out}={\bar {X}}B_{in}+{\bar {X}}Y+YB_{in}}
Subtractor
MIPS microprocessor
The R4000 is a microprocessor developed by MIPS Computer Systems that implements the MIPS III instruction set architecture (ISA). Officially announced
R4000
Computer hardware technology
Instruction sets Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC
Trusted_Execution_Technology
Propagation Chains" (PDF). IEEE Transactions on Computers. 43 (8): 880–891. CiteSeerX 10.1.1.352.6407. doi:10.1109/12.295850. Lessard, Louis Philippe (2008). "Fast
Redundant binary representation
Redundant_binary_representation
Search problem
efficient algorithms exist to speed up MIPS search. Under the assumption of all vectors in the set having constant norm, MIPS can be viewed as equivalent to a
Maximum_inner-product_search
Hennessy (creator of MIPS) for teaching purposes MIPS architecture, MIPS-32 architecture MIPS-X, developed as a follow-on project to the MIPS architecture Reduced
Single-cycle_processor
rates: 16 MHz, 5 MIPS 20 MHz, 6 to 7 MIPS, introduced February 16, 1987 25 MHz, 7.5 MIPS, introduced April 4, 1988 33 MHz, 9.9 MIPS (9.4 SPECint92 on
List_of_Intel_processors
are designed by Imagination Technologies, MIPS Technologies, and others. It displays an overview of the MIPS processors with performance and functionality
List of MIPS architecture processors
List_of_MIPS_architecture_processors
Chinese microprocessor manufacturer
STMicroelectronics bought a MIPS license for Loongson, and thus the processor can be promoted as MIPS-based or MIPS-compatible instead of MIPS-like. In June 2009
Loongson
RISC microprocessor
developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in June 1988, it was the second MIPS implementation
R3000
MIPS microprocessor
a RISC microprocessor implementation of the MIPS IV instruction set architecture (ISA) developed by MIPS Technologies, Inc. (MTI), then a division of
R10000
Unscientific measurement of CPU speed made by the Linux kernel
BogoMips (from "bogus" and MIPS) is a crude measurement of CPU speed made by the Linux kernel when it boots to calibrate an internal busy-loop. An often-quoted
BogoMips
Microprocessor developed by MIPS Computer Systems
R2000 is a 32-bit microprocessor chipset developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in
R2000_microprocessor
Protein family
Inflammatory Proteins (MIP) belong to the family of chemotactic cytokines known as chemokines. In humans, there are two major forms, MIP-1α and MIP-1β, renamed CCL3
Macrophage inflammatory protein
Macrophage_inflammatory_protein
Instruction set extensions accelerating AES operations
several cryptographic algorithms, including AES. Cavium Octeon MIPS All Cavium Octeon MIPS-based processors have hardware support for several cryptographic
AES_instruction_set
1981–2009 American computing company
future generations of MIPS microprocessors (the 64-bit R4000), SGI acquired the company in 1992 for $333 million and renamed it as MIPS Technologies Inc.
Silicon_Graphics
Computer operating system
Availability for MIPS IRIX Products". Archived from the original on October 19, 2007. Retrieved November 2, 2007. "SGI Support of MIPS® IRIX® Products
IRIX
Higher level of microcode
Instruction sets Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC
Millicode
Microprocessor developed by MIPS Computer Systems
The R6000 is a microprocessor chip set developed by MIPS Computer Systems that implemented the MIPS II instruction set architecture (ISA). The chip set
R6000
Family of Unix-like operating systems
supercomputers Alpha, ARC, ARM, C-Sky, Hexagon, LoongArch, m68k, Microblaze, MIPS, Nios II, OpenRISC, PA-RISC, PowerPC, Power ISA, RISC-V, ESA/390, z/Architecture
Linux
Supercomputer manufactured by Cray Research
The Cray X-MP was a supercomputer designed, built and sold by Cray Research. It was announced in 1982 as the "cleaned up" successor to the 1975 Cray-1
Cray_X-MP
American fabless semiconductor company
semiconductor company based in San Jose, California, specializing in ARM-based and MIPS-based network, video and security processors and SoCs. The company was co-founded
Cavium
Microsoft operating system family
been released for a variety of processor architectures, initially IA-32, MIPS, and DEC Alpha, with PowerPC, Itanium, x86-64 and ARM supported in later
Windows_NT
2014 family of single-board computers
Technologies to promote educational research and software development based on the MIPS architecture. The first board in the platform, the Creator Ci20, was released
Imagination_Creator
UNIX workstation series
to the MIPS architecture, with MIPS III and MIPS IV microprocessors such as the R3000, R4000, R4400, R4600, R4700, and R10000. The fastest MIPS processors
Sony_NEWS
workstation OVPsim also emulates MIPS, and where all the MIPS models are verified by MIPS Technologies QEMU also emulates MIPS MIPS architecture "Changes to Spim"
SPIM
Office suite by Microsoft released in 1994
version of Microsoft Office and hence native for Windows NT 3.1 (i386, Alpha, MIPS and PowerPC platforms). However, the PowerPoint component remained in 16-bit
Microsoft_Office_4.x
Extension to the MIPS architecture
Linley (18 November 1996). "Digital, MIPS Add Multimedia Extensions". Microprocessor Report. Silicon Graphics Introduces Enhanced MIPS Architecture v t e
MDMX
Computing standard based on MIPS architecture
their own reasons for joining the ACE effort. MIPS wanted to reverse the fragmentation seen with existing MIPS-based systems that had limited wider adoption
Advanced Computing Environment
Advanced_Computing_Environment
Value for unrepresentable data
signaling/quiet bit in recent MIPS processors is now configurable via the NAN2008 field of the FCSR register. This support is optional in MIPS Release 3 and required
NaN
Server software for macOS
Mac OS X Server is a series of discontinued Unix-like server operating systems developed by Apple, based on macOS. It provided server functionality and
Mac_OS_X_Server
500 mips MIPS32 emulator, can be used to develop software using virtual platforms, emulators including MIPS processors running at up to 500 MIPS, the
List_of_emulators
Family of proprietary audio codecs owned by Qualcomm
settings of other scalable parameters, aptX HD can encode a 48 kHz 16-bit stereo audio stream using only 10 MIPS on a modern RISC processor with signal processing
AptX
Series of Linux-powered DVB digital television receivers
multimedia brand Ceru Co., Ltd. All older Vu+ hardware set-top boxes are MIPS-powered, newer are all ARM-powered and uses Enigma2 image based software
Vu+
American non-profit corporation
8 May 1989. p. 3. Retrieved 12 August 2025. "MIPS Cleans Up in Performance Stakes – Official". Unigram/X. 8 October 1989. p. 2. Retrieved 12 August 2025
Standard Performance Evaluation Corporation
Standard_Performance_Evaluation_Corporation
Prototype single-stage-to-orbit rocket developed & flown between 1991-1996
thrusters Guidance, Navigation and Control Avionics: Advanced 32 bit, 4.5 mips computer, F-15 Navigation System with ring laser gyros. F/A-18 accelerometer
McDonnell_Douglas_DC-X
Sony image processors
MA07170 chip from a MegaChips (MCL) family of 32-bit RISC processors with MIPS R3000 core. Similar MegaChips processors had been used in the DSLR-A100 (MA07169)
Bionz
NATO-centred military coordination organization
(formerly known as C3 Board). MIM is the baseline for the MIP 4.x Information Exchange Specification (MIP4.x-IES), which offers a service oriented architecture
Multilateral Interoperability Programme
Multilateral_Interoperability_Programme
Chinese semiconductor company
purpose MIPS registers. It consists of sixteen 32-bit data registers and a 32-bit control register. CPUs which support MXU are used in MIPS Creator single-board
Ingenic_Semiconductor
Computer network operating system
in NetWare 3.x (c. 1992) and 4.x (c. 1995), consisting mainly of FTP services and UNIX-style LPR/LPD printing (available in NetWare 3.x), and a Novell-developed
NetWare
Computer terminal and workstation family
refocused to the MIPS-based 4D/70, and only saw release with 4D1-3. Beginning in 1987, Silicon Graphics began selling workstations with MIPS RISC processors
SGI_IRIS
Evacuation Kit for pSOS+ users, designed to provide a migration path to its ThreadX RTOS. During August 2000, MapuSoft Technologies Inc. came up with the pSOS
PSOS (real-time operating system)
PSOS_(real-time_operating_system)
load-store unit (LSU) and a branch execution unit (BXU). Instruction set: MIPS III, MIPS IV subset with Sony's proprietary 107 vector SIMD multimedia instructions
PlayStation 2 technical specifications
PlayStation_2_technical_specifications
Mechanism of function calls in computers
For RISCs including SPARC, MIPS, and RISC-V, registers names based on this calling convention are often used. For example, MIPS registers $4 through $7 have
Calling_convention
1993 Microsoft operating system version
large networks and to be portable, compiled for Intel x86, DEC Alpha and MIPS based workstations and servers. It was Microsoft's first 32-bit operating
Windows_NT_3.1
Real-time operating system
ThreadX is an embedded real-time operating system (RTOS) programmed mostly in the C language. It was originally released in 1997 as ThreadX when Express
ThreadX
Handheld game console
The Neo Geo X (NGX) is a hybrid video game console manufactured by Tommo, licensed by SNK Playmore and released on December 18, 2012. It features games
Neo_Geo_X
List of Android operating system versions
ARMv5), with x86_64 or 32-bit x86 and MIPS architectures also officially supported in later versions of Android. MIPS support has since been deprecated and
Android_version_history
Medical imaging procedure
rotating X-ray tube and a row of detectors placed in a gantry to measure X-ray attenuations by different tissues inside the body. The multiple X-ray measurements
CT_scan
Real-time operating system
ARM, IA-32, MIPS, and PPC architectures with built-in workflows and OS awareness for Nucleus RTOS and Mentor Embedded Linux. Nucleus 3.x introduced a
Nucleus_RTOS
Soviet computer model (1968–1985)
achieved a performance of 1 MIPS. The CDC 6600, a common Western supercomputer when the BESM-6 was released, achieved about 2 MIPS. The system memory was word-addressable
BESM-6
PDA product line by Casio
120 mm × 20 mm :: 184 g CPU: NEC VR4111 MIPS at 69 MHz Memory: RAM 4 MB and ROM 8 MB Display: FSTN LCD, 240 x 320 Pixel, 4 shades of gray Interface: Serial
Casio_Cassiopeia
Database project devoted to the ranking of computers
in November 2017 had a MIPS-based design as a small part of the coprocessors. Use of 2,048-core coprocessors (plus 8× 6-core MIPS, for each, that "no longer
TOP500
Animated cursor-chasing cat program
made by David Harvey from the X source. Ports have been made for the x64 version of Windows, along with the Dec Alpha & MIPS versions of Windows NT. A BeOS
Neko_(software)
Computer architecture bit width
exceptions are older or embedded ARM architecture (ARM) and 32-bit MIPS architecture (MIPS) CPUs) have integrated floating point hardware, which is often
64-bit_computing
Computer instruction for returning hardware-generated random numbers
Instruction set extensions SIMD (RISC) Alpha MVI ARM NEON SVE MIPS MDMX MIPS-3D MXU MIPS SIMD PA-RISC MAX Power ISA VMX SPARC VIS SIMD (x86) MMX (1996)
RDRAND
Suhre Karsten; Spannagl Manuel; Mayer Klaus F X; Stümpflen Volker; Antonov Alexey (January 2011). "MIPS: curated databases and comprehensive secondary
Munich Information Center for Protein Sequences
Munich_Information_Center_for_Protein_Sequences
American computer scientist (born 1952)
scientist and chairman of Alphabet Inc. Hennessy is one of the founders of MIPS Technologies and Atheros, serving as 10th president of Stanford University
John_L._Hennessy
Method to solve optimization problems
x 1 , x 2 ) = c 1 x 1 + c 2 x 2 {\displaystyle f(x_{1},x_{2})=c_{1}x_{1}+c_{2}x_{2}} Problem constraints of the following form e.g. a 11 x 1 + a 12 x
Linear_programming
processors, memory and four PCI-X slots on two buses. Each compute module features an IP53 node board, which contains two or four MIPS R16000 microprocessors clocked
SGI_Origin_350
Programmable machine that processes data
just a few simple instructions. The following example is written in the MIPS assembly language: begin: addi $8, $0, 0 # initialize sum to 0 addi $9, $0
Computer
Line of single-chip microprocessors from Microchip Technology
(PDF). Retrieved 23 September 2007. "MIPS32® M4K® Core - MIPS Technologies -MIPS Everywhere - MIPS Technologies". Archived from the original on 2009-02-02
PIC_microcontrollers
Line of personal digital assistants by NEC
featured a non-backlit 480 x 240 four-colour grayscale display and a type II PC Card slot. It had 2 MB of RAM and a NEC VR4101 MIPS microprocessor and ran
MobilePro
Interface to software defined in terms of in-process, machine code access
can affect performance. Widely used EABIs include the PowerPC, Arm, and MIPS EABIs. Specific software implementations like the C library may impose additional
Application_binary_interface
Suite of office software
Microsoft tried in the mid-1990s to port Office to RISC processors such as NEC/MIPS and IBM/PowerPC, but they met problems such as memory access being hampered
Microsoft_Office
List of notable semiconductor companies headquartered in the United States
Technology MaxLinear MCube MediaTek Mersen Microchip Technology Micron Technology MIPS Technologies Mitsubishi Electric United States Mitsubishi Gas Chemical Company
List of semiconductor companies in the United States
List_of_semiconductor_companies_in_the_United_States
Economic concept
per unit of service (MIPS) is an economic concept, originally developed at the Wuppertal Institute, Germany in the 1990s. The MIPS concept can be used
Material input per unit of service
Material_input_per_unit_of_service
Topics referred to by the same term
the audio XLR connector MIPS XLP, a 64-bit microprocessor from MIPS Technologies digEplayer XLP, a portable digital media player X-linked lymphoproliferative
XLP
Topics referred to by the same term
Semiconductor family of RISC architectures MIPS RISC/os, a discontinued UNIX operating system developed by MIPS Computer Systems OpenRISC, a project to develop
RISC_(disambiguation)
Interpreter for BASIC software
chose FLTK to implement the UI parts. Ports for Microsoft Windows, Mac OS X, and Linux would have been possible. Flyab added the ability to Yabasic to
Yabasic
Extensions to the x86 instruction set architecture
Instruction set extensions SIMD (RISC) Alpha MVI ARM NEON SVE MIPS MDMX MIPS-3D MXU MIPS SIMD PA-RISC MAX Power ISA VMX SPARC VIS SIMD (x86) MMX (1996)
Advanced_Matrix_Extensions
Raster graphics editor
Windows 11 Platform IA-32, x86-64, and ARM (historically Itanium, DEC Alpha, MIPS, and PowerPC) Included with All Microsoft Windows versions Type Raster graphics
Microsoft_Paint
First IBM supercomputer using dedicated transistors
such a system would cost roughly $2.5 million and would run at one to two MIPS. Delivery was to be two to three years after the contract was signed. At
IBM_7030_Stretch
Performance Report (FreeRTOS / ThreadX / PX5 / Zephyr) - Beningo Embedded Group 2013 RTOS Comparison (Nucleus / ThreadX / ucOS / Unison) - Embedded Magazine
Comparison of real-time operating systems
Comparison_of_real-time_operating_systems
Identification friend or foe system
IFF Mark X was the NATO standard military identification friend or foe transponder system from the early 1950s until it was slowly replaced by the IFF
IFF_Mark_X
Personal computer
of these machines was reported as increasing from 7 MIPS to 10 MIPS, this compared to almost 13 MIPS for a 25 MHz ARM3. By employing a 16 MHz clock signal
Acorn_Archimedes
Linux-powered television receiver
Dreamboxes, it features an STMicroelectronics CPU instead of PowerPC or MIPS. There are a number of different models of Dreambox available. The numbers
Dreambox
Linux distribution for wireless routers and embedded systems
wireless mesh nodes. GitHub Project Linino – OpenWrt-based distribution for the MIPS-based Arduino Yùn: GitHub Project Midge Linux – an OpenWrt-based distribution
OpenWrt
British semiconductor and software design company
it would sell its MIPS and Ensigma businesses. Imagination Technologies sold MIPS processor rights to Tallwood MIPS Inc in 2017. MIPS Technologies was
Imagination_Technologies
Operating system
the NSC-32x32 (up to Sinix 5.2x) and Intel 80486 CPUs (Sinix 5.4x - non MIPS) in their MX-Series. Later versions of SINIX based on System V were designed
SINIX
MIPS X
MIPS X
Girl/Female
Arabic, Muslim
Of Dark Lips
Girl/Female
Arabic, Australian, French, Indian, Muslim, Sindhi
Darkness of Lips
Girl/Female
Indian
Finger tips
Girl/Female
Gujarati, Indian
Lovely; Part of Lips
Female
Dutch
, bitter.
Boy/Male
Czechoslovakian
Has big lips.
Surname or Lastname
English
English : variant of Mims.
Girl/Female
Muslim/Islamic
Of dark lips
Girl/Female
Muslim
Of dark lips.
Surname or Lastname
English
English : habitational name from Mimms (North and South Mimms) in Hertfordshire, most probably derived from an ancient British tribal name, Mimmas.
Girl/Female
Muslim
Darkness of lips
Girl/Female
Arabic
Lips
Girl/Female
Arabic, French, Gujarati, Indian, Kannada, Muslim, Sindhi
Finger Tips; Delicate
Girl/Female
Muslim/Islamic
Darkness of lips
Girl/Female
Muslim/Islamic
Delicate finger tips
Boy/Male
Hindu, Indian, Sanskrit
Lips
Girl/Female
Hindu, Indian
Dimple
Girl/Female
Afghan, Arabic, Hindu, Indian, Muslim, Sindhi
Sweet Lips; Dark-lipped; Of Dark Lips; Having Beautiful Dark Lips
Girl/Female
Muslim
Finger tips
Male
Dutch
, whom Jehovah has established (or appointed).
MIPS X
MIPS X
Boy/Male
American, Australian, Irish
Small; Little Dog
Boy/Male
Latin
God of water.
Boy/Male
Muslim
Observer
Boy/Male
Gujarati, Hindu, Indian, Kannada, Malayalam, Marathi, Oriya, Sanskrit, Sindhi, Telugu
The Moon
Boy/Male
Tamil
Vidhyadhar | விதà¯à®¯à®¾à®¤à®°
Full of knowledge
Female
Native American
Native American Algonquin name TAKHI means "cold."
Surname or Lastname
English
English : variant spelling of Herod.
Girl/Female
Arabic, Australian, Chinese, Muslim
Delightful; Elevated
Boy/Male
Indian, Punjabi, Sikh
Embodiment of the Pure
Male
Polish
Polish form of Latin Gustavus, GUSTAW means "meditation staff."
MIPS X
MIPS X
MIPS X
MIPS X
MIPS X
a.
Having thick lips.
a.
Having thick lips.
pl.
of Miss
a.
Having broad, hangling lips.
n.
The making, or study, of maps.
v. t.
To fail of hitting, reaching, getting, finding, seeing, hearing, etc.; as, to miss the mark one shoots at; to miss the train by being late; to miss opportunites of getting knowledge; to miss the point or meaning of something said.
adv.
At random; hit or miss. (Obs.)
n. pl.
Lips.
imp. & p. p.
of Miss
v. t.
To touch with the lips; to put the lips to; hence, to kiss.
a.
Ruby-colored; red; as, ruby lips.
a.
Having two lips.
n.
An affectionate, or contemptuous, form of miss; a young girl; a miss.
n.
One whi sips.
p. pr. & vb. n.
of Miss
a.
Having no lips.
v. t.
To miss; to regret.
a.
Like a miss, or girl.
v. i.
To drink a small quantity; to take a fluid with the lips; to take a sip or sips of something.
n.
A young unmarried woman or a girl; as, she is a miss of sixteen.